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Quality of Tools May Reflect Licensing Flaw

John Cooley has released his DAC 2000 Trip Report, an annual summary of the observations of electronic design engineers who attended the Design Automation Conference held in Los Angeles, California, in June. Comments volunteered by 113 engineers revealed that EDA users have generally become skeptical and jaded, having all too much experience with tools that often don't work as promised.

Cooley is an independent design consultant who has built a cult following with his email newsletter that started out as an unauthorized Synopsys User Group. In his latest DAC trip report, he starts out with his own rant about his strong mistrust of any claims about a new EDA tool until he heard from a real, working engineer that at least one chip has been successfully taped out using that tool.

Cooley points out that chip design differs from the software world, where bugs found in, say, a Microsoft operating system can be fixed in a new release or, if minor, simply downloaded via the Web as a patch. In the hardware world, the chip designer and his company are completely at risk if a design tool doesn't work properly. Schedules are disrupted and product quality is compromised - often at great cost to the company and its design team - if the tools they select aren't proven in advance to be up to the task.

Costly Bugs Highlighted

The Pentium bug a few years ago cost Intel around US$0.5 billion. More recently, the US District Court in Texas ordered Toshiba to pay out US$2.1 billion dollars in penalty for a subtle hardware bug with the floppy disk controller chip in their laptop computers. And as Cooley points out, these are just a few of the hardware errors that have made the mainstream news. In the hard core chip design world, there are hundreds of companies that, over the years, have either died or were seriously affected because of a hardware design problem. We're talking about completely missed market windows, or times when competitors got there first, or the thousands of chips that just never made it to fab.

Liability Change Urged

When a relatively minor mistake gets made on a chip, the company may have to pay a huge non-recurring engineering (NRE) cost to re-spin the chip, not to mention its own missed market window and product liability issues. But under our current business practices, the EDA vendor never assumes any liability when things go wrong. This certainly points to an inherent flaw in the EDA business model, but it could end up being an opportunity if there could be an equitable "give and take" between the EDA vendor and its customer, the system house.

For example, what would it be like if EDA vendors were to share the risk with their customers for getting a complex IC design to successful tapeout? What if EDA vendors were to be penalized if their tools allowed bugs to slip through? But, to be fair, the EDA licensing contracts must give the tool vendors a royalty payment as a percentage of the final product - either the single chip or the entire system in which it resides, whichever makes sense. This way, the EDA vendors would have a vested interest in their customer's success, and would take a highly participatory role in improving the tool immediately, based on customer needs.

An added benefit would be that the EDA vendors would undoubtedly realize more revenues under this licensing scheme, because they would be sharing in some mighty lucrative product introductions on the part of their customer base. This relationship between vendors and customers would help EDA to become more profitable as an industry, given that the EDA industry growth rate is forecast to be around 6-8% in 2000, compared to upwards of 22% for some of its customers' industries.

If the EDA industry were more profitable, the result would be an increase in the amount of development resources EDA vendors could commit to future tools. Customers would then enjoy an overall improvement in tool quality that would continue to benefit them in the future.

The main catch to this scenario is whether the parties can agree that an EDA tool is performing as promised, or not. It would seem that performance standards need to be created for each type of tool, based on an agreed set of metrics. This need could be addressed by the new company that was just spun out of Collett International at DAC, a start-up called Numetrics Management Systems.

Assigning Responsibility

Ron Collett has taken the performance metrics he has used for his multi-client chip design studies and made them available to engineering managers as Internet-based software applications. This technology could form the basis for contractual agreements on how to assign responsibility for tool performance against design team performance.

The goal would be to take the finger-pointing, blame, and disappointment out of the discussions between vendors and customers. With good metrics and well-written standard contract clauses, the performance of a tool would not need to be the subject of endless legal disputes. With an eye towards co-operation and mutual satisfaction, we could all make the task of designing tomorrow's big chips an easier, faster endeavor.

by Rita Glover

(September 2000 Issue, Nikkei Electronics Asia)

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