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[Cover Story] ARM CPU Core Dominates Mobile Market

Microcontrollers with internal ARM-architecture central processing unit (CPU) cores account for the lion’s share of the mobile telephone market, having pushed aside the competition to take an astonishing share of over 70% (Fig 1).

Palm Inc and Microsoft Corp, both of the US, have selected the ARM CPU core for the operating system (OS) platform for use in their next-generation personal digital assistants (PDA). “Why did we choose ARM? Because we are confident it will be the most popular in the future,” said Steve Sakoman, chief technology officer (CTO) of Palm.

Motorola, Intel Follow

Motorola Inc has canceled its plans to use its own M-Core CPU core, developed as a top-priority corporate project, in cell phones and PDAs, and instead has adopted the ARM CPU core. According to Roy Druian, technical marketing manager, Wireless Communications Division, Wireless Subscriber Systems Group, Semiconductor Products Sector of Motorola, “When we saw how widely the ARM CPU core was being used, we realized it was just a waste to keep pumping money into developing our own.”

Motorola’s first microcontroller to use the ARM CPU core is the DragonBall MX1, which is designed for use in new PDAs integrating the next-generation of Palm OS to be announced by Palm in 2002.

Intel Corp purchased a license for the Xscale CPU core (see sidebar on p39) following their earlier purchase of one for StrongARM in the embedded systems market. Microcontrollers with the new core will be marketed in the first half of 2002 for portable equipment. The chip will probably also integrate the digital signal processor (DSP) core, jointly developed with Analog Devices Inc of the US, and Flash memory (Fig 2).

Intel has over 20 application-specific standard products (ASSP) using Xscale architecture under development now. “The projects have diverse goals, including baseband ICs, network processors and I/O ICs,” said Joel Madrigal, technical marketing manager, Wireless LAN Operation, Intel. When personnel in related technologies like packaging and processing are counted in, he adds, there are several thousand people involved in Xscale development.

Beyond Mobiles

Utilization of the ARM cores is spreading beyond the mobile equipment sector. Kyle Craig, product marketing manager at Accelerated Technology Inc of the US, which is working on the Nucleus PLUS realtime OS for embedded systems, said, “There has been a sharp rise in demand for OS supporting the ARM CPU core in the last year. It is proliferating into not only the mobile device market, but into all markets, including automotive and office automation equipment.”

Even so, the size of the market held by competitors is still large. The MIPS architecture from MIPS Technologies Inc of the US, for example, is the dominant force in set-top boxes. Even though there is considerable potential demand in the area of terrestrial digital broadcasting, the ARM CPU core has almost no delivery record in the field.

ARM believes it may gain the upper hand in developing that market as well, though. Noel Hurley, market segment manager in charge of sales strategy for the consumer electronics market at ARM, commented, “Our first goal is to become a supplier for the top firms in the market, regardless of what it takes.” This is the method they used to succeed in the cell phone market. When Nokia of Finland, the market leader, adopted the ARM CPU core, the rest of the cell phone manufacturers were quick to follow suit. In set-top boxes as well, according to Hurley, the company is moving ahead: “Major European manufacturer Pace Micro Technology plc of the UK is already using our chips, and about a dozen other firms have begun designing set-top boxes using the ARM CPU core.”

Analyzing Strengths

As embedded system manufacturers continue to switch over to the ARM CPU, more and more integrated circuit (IC) manufacturers are entering into license contracts, and the product portfolio is expanding steadily. In response, OS and development tool vendors are making support for the ARM CPU a priority.

The trigger for ARM’s sharp growth was its adoption in the Nokia 6110 cellular telephone, a Global System for Mobile Communication (GSM) model shipped by Nokia in 1998 (Fig 3).

At the time, the market share of the ARM CPU core was far behind that of competitors like MIPS Technology (MIPS architecture) and Hitachi Ltd (SH architecture). But then Texas Instruments Inc (TI) of the US, which was interested in expanding its share of ICs in the cell phone market, selected the ARM CPU core to integrate with its own DSP core. This chip was tapped by cell phone company Nokia, setting off a new trend.

Until ARM was selected by TI, in fact, ARM had considered the cell phone market as merely one of many potential markets, and hadn’t assigned it any priority. Once the ball started rolling, though, the effects were much greater than anyone had expected, because at that time a one-chip implementation of baseband processing was a startling advance. ARM chief technical officer Mike Muller recalled, “As soon as Nokia announced their product, we were swamped with inquiries from IC manufacturers who had never talked to us before.”

There were two possible strategies to adopt. The first was a neutral business stance. In the embedded systems market there are a large number of players, including equipment manufacturers, IC manufacturers, OS vendors, and development tool vendors. Too much stress in the wrong area of the market, or excessive variation in the architecture or licensing terms, could destroy this neutrality. ARM tried to maintain as neutral a position as possible, minimizing variations in the architecture. They were able to maintain a stable instruction set, and made it possible for many OS and development tools to support the ARM CPU core.

The other option was self-proliferation. In this scenario, the firm would publicly disclose the technical specifications for their proprietary internal bus, make it easier for intellectual property (IP) core vendors to enter the market, and modify the licensing format to stimulate IC manufacturers to use it in a wide variety of application-specific IC (ASIC) designs. This would mean penetration of the diverse ASIC market.

C Language Driven

The changes in the software development stance of equipment manufacturers also gave ARM a big boost. Up until that time it was extremely difficult to switch to a different microprocessor once a product line had been launched. This was because it was tough to assure object code level compatibility with existing software resources, and there would be losses in programming know-how. As embedded programs grew in scale and CPU core performance soared, however, more and more software development was handled with high-level languages. Today, as Palm’s Sakoman explained, “There are very few programmers who even use Assembly for OS development. The majority use C or a similar language.”

As a result, it became more important for embedded-system designers to choose the most common OS and software libraries, tapping the application programming interface (API), than to use Assembly even with its close relationship to the instruction set. “In the past,” said Motorola’s Druian, “there were many cases where the focus was on detailed instruction set specs, or internal cache hit rate. There aren’t many equipment manufacturers who worry about problems like that any more.”

Single Source

A comparison with the strategy adopted by the number two player in the CPU core market, MIPS Technologies, is revealing (Fig 4).

The MIPS architecture started with the flexibility to add to the original instruction set. Licensed IC manufacturers (licensees) were able to define their instruction set by themselves to promote the development of microcontrollers with their proprietary features. Each IC manufacturer made the instruction set to suit its own needs. This strategy was best suited for a software development environment that was intentionally dependent on hardware. This is why the MIPS chip remains extremely strong in the home game system market.

This also meant that the instruction set was slightly different between microcontrollers. “We don’t offer tools optimized for individual microcontrollers, except for chips where large shipping volumes are expected,” said David Partington, director, Strategic Marketing, Metrowerks Corp of the US. IC manufacturers who used proprietary instruction sets had to either provide their own development tools or order separately from development tool vendors.

ARM, on the other hand, strictly managed the instruction set for its architecture. ARM CPU cores have steadily expanded the architecture to meet changing applications in the embedded systems market, while ARM maintains downward compatibility in the instruction set.

Compared to the MIPS architecture, IC manufacturers have less freedom, and as a result ARM chips were less popular in applications where a proprietary instruction set was essential. The sudden surge in cell phones and digital home appliances, however, changed the situation. Even though detailed adjustments were not possible, developers needed a convenient way of efficiently developing a large number of models. ARM assured downward compatibility, which meant that any OS or development tool supporting the latest architecture could also be used for any prior CPU core in the line, in principle. For the OS and development tool vendors, this meant simpler maintenance.

In 1998, when MIPS narrowed its business focus to the development of CPU cores for the embedded systems market, it finally recognized the need for a stable instruction set. In 1999, the firm announced the MIPS32 and MIPS64, integrating all the prior specifications. In fact, however, a number of licensees are still marketing products with proprietary instruction sets.

Internal Bus Disclosure

ARM tried two different methods of convincing IC manufacturers to adopt its cores in a broad range of products, namely: (1) disclosing the Advanced Microcontroller Bus Architecture (AMBA) used to connect the ARM CPU core and the peripheral circuits, free of charge; and (2) once an IC manufacturer had signed up as a licensee, a license would be provided to promote the development of a wide variety of IC chips using the same CPU core.

The 1998 disclosure of the internal bus was said to have increased the number of vendors offering peripheral circuit IP cores for the ARM CPU core. The situation closely resembled Intel’s disclosure of the Peripheral Component Interconnect (PCI) bus for personal computers, which was intended to stimulate a flood of expansion boards.

“As a result, AMBA perfectly matched the desires of the IP core vendors who wanted to market peripheral circuits for the ARM CPU core. Thus, it became a de facto standard,” explained Masamichi Izumida, manager, Tsukuba Design Center, IC Design Department, Seiko Epson Corp. It was so successful in penetrating the market, in fact, that rival MIPS even offers a bridge circuit called BusBridge to link its own CPU cores with an AMBA-specification bus.

Multiple Varieties

ARM’s licensing strategy is to limit charges to just the royalty fees for any additional products designed to use the CPU core already licensed. This has made it possible for IC manufacturers to sell a wide variety of ICs all using the same CPU core, and quickly recoup their initial licensing fee (Fig 5). Royalty payments rose, of course, but royalties are pegged to revenues, so there is less risk even if the IC doesn’t sell. By providing a system that coaxes licensees to expand their product portfolio, ARM has been able to achieve phenomenal growth in the types of IC with ARM CPU cores.

Mike Muller, ARM’s CTO, put it this way: “In a perfect world, each IC manufacturer really wants to make and sell a single IC in massive volumes. If that happened, though, development tool vendors would not be happy, because their profit comes from selling a variety of development tools. This was a major problem for which we had to find a solution.”

To further strengthen this system, ARM is considering a new licensing scheme based on “subscription deals”. Once an IC manufacturer signs a licensing agreement, they can utilize any ARM CPU core for a limited period of time. It is expected that the licensing fee will be higher than in the current system which restricts the CPU cores licensed and, as a result, licensees are expected to release a large number of varieties in a short time. This policy will no doubt further increase the number of ASIC products with ARM CPU cores.

Seeking Blind Spots

One might ask, Doesn’t ARM have any blind spots? CPU core development costs are rising as industry demands faster CPU cores in the embedded systems market, and some industry observers believe it will be harder for ARM to maintain their specification.

In general, the faster the CPU core, the heavier the development load. A look at maximum operating frequency of ARM CPU cores shows no increase since the announcement of the ARM10 in 1998. And while it was about two and a half years between the announcement of the ARM7 and the ARM9, shipment of the “Jaguar” CPU core, positioned as the series successor to the ARM10, is scheduled in 2002 — about four years after the ARM10 itself was announced.

One method ARM has used to reduce the increasing development load has been to release software core products. Since 1998, the number of software core products has been increasing apace with operating frequency. “From the ARM9, with an operating frequency of 200MHz, the development load for hardware core products has surely increased,” said Takio Ishikawa, president of ARM KK, a subsidiary in Japan.

With regard to software cores, IP core vendors actually provide register transfer level (RTL) data that can be used in logic synthesis. After synthesis, parameters are adjusted to match actual manufacturing process characteristics by the licensee — in this case, the semiconductor manufacturer. As a result, software cores generally reduce the amount of work done by the IP core vendor, and increase the load on the semiconductor manufacturer.

Software and hardware cores have their own advantages and disadvantages, and the final choice is usually made by the licensee, depending on development time and the performance demanded by the application.

Until now, however, most of ARM’s business success has come from hardware core sales to licensees. In the case of moderate-speed microprocessors, it is likely that the wired and laid-out hardware IP core may deliver sufficient performance. As one microcontroller engineer commented, “For the licensee, the hardware core is easiest.”

Portable Macrocells

What attracted the semiconductor manufacturers to ARM in the first phase was high portability, making it easy to assure operation even after a change in the manufacturing process. Silicon Wave Inc of the US, which is developing Bluetooth chipsets, switched the CPU core for its baseband processor (announced in October 2001) from Hitachi$B%1(Bs H8 to the ARM7TDMI. One of the reasons given for this was “easy porting, making it possible to ramp up rapidly even if we shift manufacturing to a different foundry,” according to Masaharu Katayama, representative director and general manager of Silicon Wave Japan KK.

This feature made it easy to embed low frequency CPU cores, such as the ARM7, with operating frequencies of several dozen megahertz. When the operating frequency exceeds 200MHz in the high-performance ARM9, however, it is possible that the portable macrocells will become a major stumbling block. The development of high-speed microprocessors may go smoothly if process portability is sacrificed in favor of designing a CPU core optimized to a specific manufacturing process.

Double-Edged Sword

To reduce the steadily rising development load caused by higher chip performance, ARM is beginning to investigate cooperative activities with semiconductor firms operating their own fabs. One good example is the architecture license, already signed with Intel and Motorola, under which the next generation of ARM architecture will be jointly developed.

Greater interaction with individual firms, however, is a double-edged sword for ARM. Once they launch CPU core design with a firm which has its own microprocessor design capability, process technology and sales network, it becomes entirely possible that decisions on the future of the architecture would be made by the licensee instead of ARM.

Some signs of this are already apparent in the area of instruction set compatibility. For example, the Xscale ARM microprocessor, which Intel plans to release as the successor to StrongARM, has ten Intel Media Processing Technology coprocessor instructions added to it, which are only used by Intel. Intel has commented that it has no plans to license these instructions to other firms.

ARM emphasizes the equality of the partnership, saying they “worked closely with Intel in the development of the Xscale,” and “technological results gained through the architecture license will be fed back into the next-generation ARM architecture.” Still, the addition of value-added instructions and the fact that the manufacturing process needed for high-speed operation will be limited to only a few firms has the potential to destroy the neutrality that ARM has used to attract so many semiconductor and equipment manufacturers thus far.

by Hiroki Eda and Tomonori Shintoh

Accelerated Technology: http://www.acceleratedtechnology.com
ARM: http://www.arm.com
Hitachi: http://global.hitachi.com
Intel: http://www.intel.com
Metrowerks: http://www.metrowerks.com
Microsoft: http://www.microsoft.com
MIPS: http://www.mips.com
Motorola: http://www.motorola.com
Nokia: http://www.nokia.com
Pace Micro Technology: http://www.pace.co.uk
Palm: http://www.palm.com
Seiko Epson: http://www.epson.co.jp/e/index.htm
Silicon Wave: http://www.siliconwave.com
Texas Instruments: http://www.ti.com

(April 2002 Issue, Nikkei Electronics Asia)

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