|Ishiuchi depicted the future of such chips in an address entitled
"Process Integration of Embedded DRAMs" at the IEEE Custom Integrated
Circuit Conference '98 (CICC'98) international symposium
held in Santa Clara, CA, from May 11.
A PC-on-a-chip will come true using the 0.12-0.13 micron design
rule, and then integrating a 512Mb DRAM and 2 million logic gates
onto a chip, Ishiuchi said.
He also said that system ICs in the 0.12-0.13 micron era must
have a dual-gate oxide film structure.
That means the thickness of the gate oxide film of a digital
signal processing circuit will be 2-3nm and that of analog
circuits and input-output interfaces will be about 4-5nm. The
performance of the system ICs will be improved by those
Ishiuchi recommended that semiconductor businesses should use
embedded DRAM processes as the technology driver for
semiconductor technologies in the emerging era of system ICs.
Processes for logic circuits and general purpose DRAMs will be
formulated by subtracting unnecessary processes from the embedded
DRAM process, he said.